I. Field of the Disclosure
The technology of the disclosure relates generally to improving signaling on a data bus.
II. Background
Computing devices typically have multiple integrated circuits positioned on a circuit board. Such integrated circuits may be processing devices, memory units, or have other functionality. These multiple integrated circuits may be communicatively interconnected through a data bus. Likewise, peripheral devices may also be interconnected to the integrated circuits on the circuit board through a data bus.
As processing speed has improved inside the integrated circuits, pressure has been put on the data bus to also improve speed. For example, with improved processing speed, there is a need for faster memory access across these sorts of data buses. Speed on the data bus is a function of bandwidth and frequency. Both bandwidth and frequency involve engineering tradeoffs.
Bandwidth may be increased by increasing the number of conductors that are used by the data bus. However, each conductor added needs a pin on each integrated circuit through which the conductor is coupled to the integrated circuit. Such pins are relatively expensive as a manufacturing cost, and the additional area required to route conductors to the pin is also expensive in terms of the space required to accommodate such routing areas. Frequency may be increased, but such frequency increases are achieved at the expense of increased power consumption due to higher clock frequencies and increased electromagnetic compatibility (EMC) issues.